Traditional memory cells include a memory element, which is used to store a logic state, and a selector device. The memory element and selector device may be located at a cross-point of a first signal line (e.g., word line) and a second signal line (e.g., bit line) in a memory array having a cross-point architecture. The selector may be coupled to the word line and the memory element may be coupled to the bit line in some architectures. The selector device may reduce leakage currents and allow selection of a single memory element for reading data and/or writing data. However, the use of separate memory elements and selector devices increases the number of materials and/or layers that must be formed during fabrication of the memory device, thus increasing the complexity of the structure and fabrication process. Moreover, activating the selector device and writing or reading the memory element may require high voltage and/or long duration pulses to be provided, which may increase power consumption of the memory device.